IDF CPU Report - Intel & AMD

The Willamette, as we mentioned in our first IDF Report, will have 144 new Streaming SIMD Extensions 2 (SSE2) instructions that could either make or break the FPU performance of the Willamette.  Why do we say that?

There isn’t much known about the Willamette’s FPU, as far as we know now, it alone could be inferior to the Athlon’s FPU.  Intel did very little to talk about the Willamette’s FPU at the Spring 2000 IDF, rather they focused on what SSE2 could do for the Willamette in terms of floating point performance. 

The benefits of SSE2 come from its extensions to MMX and SSE.  SSE2 offers 128-bit SIMD-Int and 128-bit SIMD Double Precision FP instructions, the former being an extension of 64-bit MMX and the latter being an extension of 64-bit SSE.  Being able to handle two 64-bit double precision FP operations will be very useful in the professional arena, especially in MCAD and 3D visualization applications among others.  This is if SSE2 is taken advantage of in these particular applications as well as the drivers on the video card level, if not, then the FPU performance of the Willamette is left at what its FPU can accomplish alone. 

SSE2 also features cache and memory management operations as well as new encryption operations.  While those last two features are a bit vague, we should know more about them at this Fall’s IDF. 

The Willamette features a 64-bit, 3.2GB/s FSB that will most likely operate at 100MHz QDR, or quadruple pumped as Intel likes to call it.  This means that the FSB operates at 100MHz but fetches 4 times as much data per clock, much like the way AGP 4X operates today. 

The only chipset to support the Willamette at its launch will be the Tehama which boasts exclusive support for RDRAM as a memory type.  The chipset will feature a dual channel RDRAM interface, much like that on the i840 chipset, which provides for a maximum of 3.2GB/s of peak memory bandwidth.  While the chipset does not officially support SDRAM, should the need arise (translation: if Intel is wrong and the cost of RDRAM doesn’t drop by the release of the Willamette), motherboard manufacturers should theoretically be able to use Memory Translator Hubs on Tehama boards to translate the RDRAM memory requests into SDRAM memory requests. 

Then again, the performance benefits of RDRAM are supposed to scale quite nicely as CPUs get faster and faster so the Willamette may actually show appreciation for RDRAM while our current 133MHz FSB Pentium IIIs are just happy with PC100/PC133 SDRAM.