AMD’s Thunderbird
As you’ve all probably heard by now, AMD has had their new Thunderbird core up and running at 1.1GHz for quite some time.
The Thunderbird core improves on the current K75 core by integrating a full 256KB of L2 cache onto the 0.18-micron die itself which, although brings the L2 cache size down from 512KB, helps to improve performance because the Thunderbird’s L2 cache will be operating at clock speed instead of some odd divisor of the core clock.
This will help to remove a huge scaling bottleneck with the Athlon and will hopefully prepare the Athlon for a heated battle between itself and Intel’s upcoming Willamette. Plus, by moving the L2 cache onto the die itself AMD will be able to follow in Intel’s footsteps and move to a socketed design which should help to reduce costs.
AMD’s current K75 core will experience at least one more speed boost before the release of the Thunderbird core which will hit the streets around the E3 timeframe in May. Other than moving the L2 cache on-die and cutting it in half, the Thunderbird should be identical to the current Athlons with an obvious improvement in performance.
According to AMD, we should expect to see a 10 – 20% boost in performance across the board by moving the L2 cache on-die and running it at the core clock speed. With the Athlon already keeping up quite well with Intel’s Pentium III, this boost should give it the momentum AMD needs to pull ahead of the Pentium III and prepare for its true match against the Willamette. Luckily, if everything goes according to AMD’s plan, the Thunderbird will never have to be put up against the Willamette.
The current Athlons will disappear shortly after the introduction of the Thunderbird core, and the Thunderbird will spin off a low-cost version of itself known as the Spitfire. The Spitfire will feature 128KB of L2 cache running at clock speed and will only be available in a 426-pin Socket A interface.
The Spitfire will be positioned against the Celeron in the low-end market, the Thunderbird should be able to square off with the remaining higher clock speed Pentium IIIs, thus paving the way for a new CPU introduction from AMD to compete with Intel’s Willamette in October.
What AMD hopes to combat the Willamette with is a combination of the upcoming Mustang core with a minimum of 512KB of on-die L2 cache as well as the higher clock speed Thunderbird solutions.
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Dr AB - Friday, May 8, 2020 - link
Surprising to see Intel's ancient SpeedStep technology even exists to this day!