Sidebar on Intel EUV

In all of these announcements, one thing to highlight is Intel mentioning its relationship with ASML, the sole company that manufactures the EUV machines powering production of leading edge semiconductor manufacturing.


ASML Wilton

ASML is a unique company in that it is the only one that can produce these machines, because the technology behind them is often tied up with its partners and research, but also because all the major silicon manufacturers are heavily invested in ASML. For any other company to compete against ASML would require building a separate network of expertise, a decade of innovation and design, and a lot of capital. None of the major silicon vendors want to disturb this balance and go off on their own, lest it shuts them out of the latest manufacturing technology, and no research fund sees competing against the embedded norm as a viable opportunity. This means that anyone wanting EUV specialist technology has to go to ASML.

In 2012, it was reported that Intel, Samsung, and TSMC all invested in ASML. This was, at the time, to jumpstart EUV development along with migrating from 300mm wafers to 450mm wafers. While we haven’t moved to 450mm wafers yet (and there are doubts we will any time in the next decade), EUV is now here. Intel’s 2012 investment of $2.1 billion gave them a 10% stake in ASML, with Intel stating that it would continue investing up to a 25% stack. Those stakes are now below the 5% reporting threshold, but all three of the major foundry customers are still big owners, especially as ASML’s market cap has risen from $24 Billion in 2012 to $268 Billion in 2021 (surpassing Intel).

As major investors but also ASML’s customers, the race has been on for these foundries to acquire enough EUV machines to meet demand. TSMC reported in August 2020 that it has 50% of all EUV machines manufactured at ASML for its leading edge processes. Intel is a little behind, especially as none of Intel’s products in the market yet use any EUV. EUV will only intercept Intel’s portfolio with its new Intel 4 process, where it will be used extensively, mostly on the BEOL. But Intel still has to order machines when they need them, especially as there are reports that ASML currently has backorders of 50 EUV machines. In 2021, ASML is expected to manufacture around 45-50 machines, and 50-60 in 2022. The exact number of machines Intel has right now, or has ordered from ASML, is unknown. It is expected that each one has a ~$150m price tag, and can take 4-6 months to install.

With all that being said, Intel’s discussion point today is that it will be the lead customer for ASML’s next generation EUV technology known as High-NA EUV. NA in this context relates to the ‘numerical aperture’ of the EUV machine, or to put simply, how wide you can make the EUV beam inside the machine before it hits the wafer. The wider the beam before you hit the wafer, the more intense it can be when it hits the wafer, which increases how accurately the lines are printed. Normally in lithography to get better printed lines, we move from single patterning to double patterning (or quad patterning) to get that effect, which decreases yield. The move to High-NA would mean that the ecosystem can stay on single patterning for longer, which some have quoted as allowing the industry to ‘stay aligned with Moore’s Law longer’.

ASML's EUV Shipments
  2015 2016 2017 2018 2019 2020 2021
Actual 2 4 10 3 4 5 6 4 7 7 8 4 7 14 8 7 9 - -
Target (Total) - - - 20 (18) 30 (26) 35 (33) 45-50
2018 and beyond is split per quarter for actual shipped numbers
Data taken from ASML's Financial Reports

Current EUV systems are NA 0.33, while the new systems are NA 0.55. ASML’s latest update suggests that it expects customers to be using High-NA for production in 2025/2026, which means that Intel is likely going to be getting the first machine (ASML NXE:5000 we think) in mid-2024. Exactly how many High-NA machines ASML intends to produce in that time frame is unknown, as if they flood the market, having the first won’t be a big win. However if there is a slow High-NA ramp, it will be up to Intel to capitalize on its advantage.

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  • Oxford Guy - Wednesday, August 11, 2021 - link

    ‘preposterously-named T2’

    According to mainstream news, Google’s phone-drone-bomb military program was called Skynet. Can’t these megacorps be even slightly creative?
    Reply
  • mode_13h - Thursday, August 12, 2021 - link

    This is *exactly* what I meant by pulling the thread off-topic. Sometimes, it naturally meanders into these directions, but you grab the wheel and launch us directly off the path and into the weeds.

    This is not contributing in good faith, IMO. It's like you're just searching for somewhere to air your grievances, not unlike the right-wingers who try to derail the discussion into some dark place about same-sex bathrooms.

    > ‘preventative indefinite detention’ — a policy then president Obama laid out in a speech.

    If he uttered those words, it must have been in reference to Guantanamo Bay, which he actually tried to shut down (and on his very first day in office, no less)! And while that move was foiled by political opposition, he did succeed in mostly emptying it out. Obama lectured on Constitutional law at Harvard and he was an institutionalist (for better and for worse). He's not the guy to end Habeas Corpus.

    > China is working to force employees to grin correctly in order for office equipment to work.

    I thought that was Canon, which is Japanese.
    Reply
  • cheshirster - Tuesday, November 23, 2021 - link

    It is no secret that having "Intel 10nm" being equivalent to "TSMC 7nm"

    There is zero evidence these are equal.
    In fact even the latest 12 gen ADL on 10+++ aka ESF loses in power efficiency to Zen3 bult on N7+12FF
    Reply
  • CBeddoe - Wednesday, December 8, 2021 - link

    One of Intel's main issues is they are trying to push transistor density beyond the capability of the manufacturing process.
    They are being hyper aggressive with their designs and can't back it up with their manufacturing capability.
    What that wiki chip transistor density comparison shows is they aren't changing the aggressive nature of their designs which likely means they won't be achieving high enough yields to meet targets and they might continue to miss their manufacturing roadmaps.
    Reply

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