We’re gearing up for a busy time when it comes to server announcements, with the recent news that AMD will be launching its next generation platform on March 15th, but also we are expecting Intel to disclose its Ice Lake Xeon Scalable platform sometime soon as well. To that point, in an on-the-record discussion I had today, Intel disclosed some interesting numbers about the state of Ice Lake Xeon Scalable deployment.

The usual fare when it comes to enterprise processor launches is that the key customers have already had the hardware in hand for at least three to six months, if not more. These key customers, usually hyperscalers, pay in advance for thousands of units to help deploy their infrastructure. They use the hardware to optimize their code, but also help the processor manufacturer test for bugs in early silicon, and then build out their infrastructure when it's ready. This has been the way for server processor deployments for over a decade or two, and for the upcoming launches, both AMD and Intel have disclosed that they’ve been in high-volume manufacturing of their latest products for some time now, with key customer deployments already taking place.

Finding numbers for how big these deployments prior to launch is often tricky. Even the order of magnitude is somewhat hard to decipher – these companies could be deploying hundreds, thousands, perhaps millions of processors well before the official public launch. A lot of it comes down to production availability, and optimizing for the customers that matter most first, before moving out to the main launch and general availability.

So cue my surprise that today, in an on-the-record call with Intel SVP and GM of the Xeon Memory Group Lisa Spelman, as we were discussing Intel’s enterprise strategy as it relates to offering complete solutions, open source libraries, and automatic optimizations on the latest feature set, some numbers were given. Lisa stated that, to date, Intel has shipped 115,000 units of Ice Lake Xeon Scalable to 30 of its key advance customers.

It’s hard to gauge what sort of time frame these deployments were made over – Intel has recently stated that through 2020 it was able to double its silicon production capacity, with its 10nm product lines getting the best percentage boost in that metric. However, Intel originally stated that it was sampling Ice Lake Xeon with key customers as far back as May 2019. With high volume manufacturing starting in Q4 and into Q1, there is obviously an ecosystem and supply chain inside Intel designed to churn out working silicon and put it into the hands of customers. It’s hard to decipher if this 115,000 number is better or worse than previous launches, due to lack of data, however it is a substantial amount of silicon to ship in advance of a full launch and wider general availability.

Lisa also stated that enabling their ecosystem with full stack solutions, building on raw performance with optimized codebases, is going to be a critical part of Intel’s strategy as it rolls out Ice Lake and future generations of Intel Xeon Scalable, alongside Intel’s other adjacent product lines (FPGA, networking, Optane DCPMM, SSD, AI accelerators). This means that alongside discussing generational updates of the key components, the discussion is also fundamentally driven by the platform as the sum of its parts.

There was also mention of the desire to enable a regular expected cadence of underlying performance improvements generation on generation, coupled with tools to accelerate customer workload that are easier to use and open source. This is being enabled as a core part of how Intel’s enterprise divisions have been architected over 2020. That includes enabling the wider ecosystem outside Intel with optimizations that used to be under Intel license, as well as pooling updated improvements for other open source solutions with the community.

Intel hasn’t formally disclosed a launch date for its upcoming Xeon Scalable 3rd Generation Ice Lake processor family, simply stating in January that it will be ‘in the coming months’. When it does, be sure to read about all the fine details here at AnandTech.


Update: Just some back of the napkin math here. Intel's middle die-size HCC on Skylake Xeon Scalable was ~480 mm2, with a production rate of 108 per wafer, assuming perfect yield. Let's work on the assumption that this would be a good die size for Ice Lake Xeon (more cores, denser 10nm process). If Intel's defect rate for 10nm was as good as TSMC's N7, for which we know the latter to be a rate of 0.09 defects per cm2, the actual yield would be 71 dies per wafer, which equates to 66%. If Intel was extracting 71 dies per wafer, then 115,000 dies would be around 1620 wafers. We don't know at this point if Intel is absorbing some of those defects by having more physical cores on the die than will be offered, and this doesn't take into account reduced die count configurations (e.g. a 20 core part from a 28-core die). But it's an interesting number.

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  • Arsenica - Tuesday, March 9, 2021 - link

    Regarding the napkin math, Ice Lake Xeons have many SKUs (from 8 to 40 cores) and many of them use 2 dies so we cannot say for sure that those 115K units use 115K dies. Reply
  • Casper42 - Wednesday, March 17, 2021 - link

    2 dies?
    I wasn't aware Intel was doing that on Ice Lake.
    I thought it was all normal monolithic dies using the previous LCC/HCC/XCC nomenclature.
    Especially as I heard XCC would be delayed compared to LCC/HCC.
  • flgt - Tuesday, March 9, 2021 - link

    I wonder to what extent Intel's control of production and supply chain will help it avoid a huge loss of market share to Milan. I would think in this market that being able to deliver 10's or 100's of thousands of processors on time is critical. Reply
  • Lakados - Tuesday, March 9, 2021 - link

    It's a huge help, AMD may be announcing their new EPYC, next week but who knows when availability will hit but one of the big purchasing times is the end of Q4 and the beginning of Q1. That way big purchases can be spread over the two years to round out the budget numbers by timing the delivery times accordingly. In my case, any hardware that arrives after July 1 can not be included in the previous year's budget and must be in the new year, and auditing is pretty hard on that rule. Ensuring availability for May & June is a big deal for a lot of Enterprise purchasing and to date, it has been a pretty consistent shortcomming on AMD's side. Reply
  • mode_13h - Wednesday, March 10, 2021 - link

    Can't really blame AMD for Intel's failings. There's no way AMD could've realistically predicted this level of demand for their products, and a big part of that has been Intel's continued failure to execute. Reply
  • edzieba - Wednesday, March 10, 2021 - link

    Are you seriously trying to blame Intel for the worldwide increase in semiconductor demand? Reply
  • mode_13h - Thursday, March 11, 2021 - link

    No, I mean their interminable 10 nm delays. Clearly.

    However, I probably read Lakados' post too quickly, as it seems to be more nuanced than I originally thought. I'm not sure my post is relevant, but oh well.
  • Yojimbo - Wednesday, March 10, 2021 - link

    AMD is in the situation they are in because of AMD. AMD spun off their fabs. The good and the bad of that decision rests entirely with AMD. AMD also put all their eggs into the TSMC 7 nm basket. The good and bad of that decision rests entirely with AMD. Reply
  • TheJian - Monday, March 15, 2021 - link

    Wasting wafers on consoles that make single digit to mid teen margins (meaning 15% or less or you'd just say 15% right?), is also why AMD is in this position. Every wafer that goes to this crap is another bunch of server/hedt/gpu products that can't be sold at MUCH HIGHER MARGIN, for ...wait for it...NET INCOME! So yeah, get ready for 3nm Intel TSMC chips as they bought 53% of the 3nm production AT TSMC...ROFL. What now AMD?

    AMD stock price falling in...Wait it already did $20ish already. RUN, or you soon will be hurt even more. AMD's income has MILES to go before it reaches their current stock price. You are currently reading part of the reason AMD will have a difficult time getting there. Stop making console chips and NET INCOME will skyrocket (each of those chips for $10-15 profit becomes 100's/1000's instead!). Best thing you could do is tell both MSFT/SONY call intel, we don't like peanuts any more! ~480mm^2 for a XEON (depending on cores). So AMD should be selling a EPYC instead of a console soc that makes $10-15. That is just stupid. No, mega stupid is a shortage of silicon. Double stupid? Whatever, it's DUMB.

    At AMD, you should be fired for committing ANY silicon to consoles going forward. You are committing NET INCOME suicide yearly not to mention wasting tons of engineering on both designs (multiple, for refreshes etc too for both consoles, what a waste of AMD resources). NV passed because it would rob from CORE R&D (yep, and NET INCOME). Oh wait, that CORE R&D is what makes more NET INCOME. So losing it...Nobody connecting the dots here? LOL. Is this coming out in chinese or something? ROFL. You should be fired for not predicting 500mm^2 dies that make you $10-15 is far worse than a roughly same size die that makes you 5K (10k? 15k? or more). That 115K they shipped is about 1/2Billion roughly at 5K each. These are tests before REAL shipments begin. You won't get that from a console. Ship 10mil of those junkers and maybe you made $200mil. If those were servers instead? BILLIONS instead. See the point? You can't afford to make peanut chips in a silicon shortage. You stop making those (like Intel did, see the 10% short on the bottom end for 2yrs or so), and move production to the HIGH MARGIN stuff as much as you can (see Intel Q reports 5.9B this Q up from 4.3B prior Q, massive INCOME GROWTH!). This isn't rocket science, but rather it's basic economics. Sell highest margin stuff until you can't, ONLY then do you make the junk because you're forced (no more high margin stuff to sell, duh). If there is a massive glut of wafers, ok, make everything you can. But in a shortage? Only a fool makes poor people products. Facebook, Google, etc etc will all pay far more than joe 6pack can for your 500mm^2. Whenever your console deal is up, FIRE the next person that says to RE-UP that contract with ANY console maker. That person is COSTING you net income. Demote LISA and re-hire the DARK MAYOR. He gets it, make kings FIRST or don't make money (comic AMD fired him 2011 for advising them to do exactly what they are doing now with cpu/server - MAKE KINGS!). The board etc chose console, he said you're all stupid, they said you're fired. A decade later, they're following DIRK's advice and kind of winning (just needed to STOP their ideas from 2011 so they could make more NET INCOME). NO CONSOLES! IDIOTS. Consoles=NO INCOME (ok, ALMOST is close enough to NONE here).

    I'll remind you all, even MSFT/SONY lost 3.5B EACH (4B+ for one of them IIRC) on the last gen (x360/ps3). I wonder what the tally will be for PS4/Xbox1. You can google that easily. Kotaku or someone wrote it along with others IIRC.

    2013 view still the same. Might be stories on the current gen, I expect less losses (machine is cheaper now), but for AMD the peanuts is just killing the INCOME/margins.

    I can't wait for the next LOSS. Why even waste the effort? Just make HEDT/SERVER/GPU instead. PLEASE! Maybe I'd be a shareholder again if they announced the end of console socs by AMD. Until then, Intel. If they crash the dollar (great reset incoming people if Biden and co aren't arrested at some point for stealing an election and finally put to death as traitors etc) Intel buys AMD or they just go bankrupt. Heck, many will go bankrupt if the current situation continues (many still shutdown etc, printing trillions while making nothing leading to massive trade def, etc). WAKE UP.
  • at_clucks - Monday, March 15, 2021 - link

    Then again consoles are what realistically bankrolled AMD while they were developing Zen. Going back and saying "such a bad decision" doesn't consider the fact that without it AMD would certainly not be in the relatively well off position they are now. Reply

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